1. Field of the Invention
The present invention relates to a spin-transfer torque magnetic random access memory (STTMRAM), and, more particularly, to an STTMRAM element having a low-crystallization temperature free layer MTJ structure.
2. Description of the Prior Art
Spin transfer torque magnetic random access memory (STTMRAM) is one of the next generations of non-volatile memory currently under development. In STTMRAM, writing magnetic bits is achieved by using a spin polarized current through the magnetic tunnel junction (MTJ), instead of using a magnetic field. The STTMRAM write current scales down with smaller MTJ size in future technology nodes. STTMRAM has significant advantages over magnetic-field-switched MRAM, which has been recently commercialized. One of the main drawbacks associated with field switched MRAM are its more complex cell architecture, which utilizes typically two additional metal lines for applying the switching field, in a one transistor and one MTJ design. These require additional processing steps and make the memory-cell size too big and too expensive. Additional drawback includes its high write current (currently in the order of milli Amps (mA)) and poor scalability, which is currently limited to about 65 nano meters (nm). On the other hand, in the STTMRAM, the spin transfer torque (STT) writing technology, by directly passing a current through the MTJ, overcomes these hurdles with much lower switching current (in the order of micro A) and ease scalability. This results in a simpler cell architecture that can be as small as 6F2 (for single-bit cells) and reduced manufacturing cost, and more importantly, improved scalability. Additionally, due to its fast read/write speed and lower voltage requirement, STTMRAM is believed to be an ideal candidate for replacing SRAM as an embedded memory into Logic devices such as from microprocessors.
Currently, most microprocessors and like logic devices utilize 40 to 80 percent of the memory area as SRAM. These SRAMs have extremely large cell size, and at the same time consumes large energy. This is becoming a limiting factor impacting the scaling of future microprocessors. Current MRAM and STTMRAM require processing temperatures requiring much higher temperature than 300 C.
What is needed is a non-volatile memory having smaller cell size that can easily be integrated into the back-end of the CMOS process and requires a low-temperature processing of typically below 300 C for a low-cost high volume manufacturing.